Index: mysql-5.7.5-m15/storage/innobase/include/ut0ut.h =================================================================== --- mysql-5.7.5-m15.orig/storage/innobase/include/ut0ut.h +++ mysql-5.7.5-m15/storage/innobase/include/ut0ut.h @@ -69,11 +69,6 @@ typedef time_t ib_time_t; # elif defined(HAVE_FAKE_PAUSE_INSTRUCTION) # define UT_RELAX_CPU() __asm__ __volatile__ ("rep; nop") -# elif defined(HAVE_ATOMIC_BUILTINS) -# define UT_RELAX_CPU() do { \ - volatile lint volatile_var; \ - os_compare_and_swap_lint(&volatile_var, 0, 1); \ - } while (0) # elif defined(HAVE_WINDOWS_ATOMICS) /* In the Win32 API, the x86 PAUSE instruction is executed by calling the YieldProcessor macro defined in WinNT.h. It is a CPU architecture- @@ -91,6 +86,8 @@ typedef time_t ib_time_t; # define UT_RESUME_PRIORITY_CPU() ((void)0) # endif +#define UT_COMPILER_BARRIER() __asm__ __volatile__ ("":::"memory") + /*********************************************************************//** Delays execution for at most max_wait_us microseconds or returns earlier if cond becomes true. @@ -302,7 +299,7 @@ Runs an idle loop on CPU. The argument g in microseconds on 100 MHz Pentium + Visual C++. @return dummy value */ -ulint +void ut_delay( /*=====*/ ulint delay); /*!< in: delay in microseconds on 100 MHz Pentium */ Index: mysql-5.7.5-m15/storage/innobase/ut/ut0ut.cc =================================================================== --- mysql-5.7.5-m15.orig/storage/innobase/ut/ut0ut.cc +++ mysql-5.7.5-m15/storage/innobase/ut/ut0ut.cc @@ -48,9 +48,6 @@ Created 5/11/1994 Heikki Tuuri #include "log.h" -/** A constant to prevent the compiler from optimizing ut_delay() away. */ -ibool ut_always_false = FALSE; - #ifdef _WIN32 /*****************************************************************//** NOTE: The Windows epoch starts from 1601/01/01 whereas the Unix @@ -379,29 +376,21 @@ Runs an idle loop on CPU. The argument g in microseconds on 100 MHz Pentium + Visual C++. @return dummy value */ -ulint +void ut_delay( /*=====*/ ulint delay) /*!< in: delay in microseconds on 100 MHz Pentium */ { - ulint i, j; + ulint i; UT_LOW_PRIORITY_CPU(); - j = 0; - for (i = 0; i < delay * 50; i++) { - j += i; + UT_COMPILER_BARRIER(); UT_RELAX_CPU(); } - if (ut_always_false) { - ut_always_false = (ibool) j; - } - UT_RESUME_PRIORITY_CPU(); - - return(j); } #endif /* UNIV_HOTBACKUP */